The resulting error code of 1010 correctly identified this single bit error. Table 2 shows the four-bit error codes for the Hamming code used in Figure 2.Ī deliberate error was introduced into data bit 4. This technique was developed by Richard Hamming in the 1950s.įigure 2. Any other error code will indicate the specific bit or even groups of bits in error. An error code of 0000 indicates that no errors have occurred. In Figure 2(B), the 12 received bits are again used to generate four parity bits, with these bits representing the error code. Using multiple parity bits to detect and correct a single bit error. These four bits are called check bits and are transmitted or stored with the original eight data bits.įigure 2. Figure 2(A) shows how four parity bits (three odd and one even) are generated using different groups of bits from the input data. In fact, by using just four parity bits, we are able to detect and correct single bit errors in our eight bits of data. The limitations of a single parity bit can be overcome by using multiple parity bits. If one bit - or three, five, or seven bits - change, the parity will also change and the error will be detected, but, if an even number of bits change, the parity will remain the same and the error will go undetected. It can only detect odd-numbered bit errors. Unfortunately, a single parity bit has limitations. If the parity does not match, you have detected an error. When the data is read back or received, its parity is checked. Now, after the parity bit is generated, it is stored with the data or transmitted with it to a receiver. So, with only a handful of gates, we are able to generate odd or even parity bits. Using an exclusive-OR gate as the last gate will generate an odd parity bit. The eight input bits are reduced to four intermediate bits, then two intermediate bits, then to a single output bit that represents the even parity for the data. The input data 10101100 is broken into four groups of two bits, with each pair driving an XOR gate. The XOR gate outputs a 0 when its inputs are the same (both low or both high) and a 1 when its inputs are different. Figure 1 shows how a single parity bit can be generated using exclusive-OR (XOR) gates. The even and odd parity bits are always complements of each other.

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